The present invention pertains in general to optical receivers and more particularly to fiber optic receivers having data clock extractors and employing methods for data clock extraction.
In fiber optic transmission systems, the intensity of a signal generated within a fiber optic transmitter by a fixed wavelength optical source, such as a light emitting diode (LED) or laser, is commonly modulated by information in the form of an encoded digital data stream. The resulting optical signal is then transmitted along an optical fiber to a fiber optic receiver having a photodetector, such as a PIN diode or an avalanche photo diode (APD). The signal detected by the photodetector is then decoded within the receiver to regenerate a pulse train representing the data stream.
The transmission of large amounts of information per unit of time in a digital system requires that the optical signal be modulated at a high rate. Consequently, the optical signal has a large modulation bandwidth. The power level of the optical signal may also vary widely. A fiber optic receiver must be capable of accurately regenerating the encoded data stream and decoding the data stream into a train of pulses over the entire bandwidth and for a wide range of power levels of the received optical signal.
The ability of the receiver to handle the range of power levels of the received signal, called the dynamic range of the receiver, is commonly increased by connecting the optical detector to a low-noise, fixed-gain amplifier coupled to an automatic gain control (AGC) circuit. The AGC circuit increases the gain of the amplifier at low signal power levels in order to bring faint signals up to an acceptable level and decreases the gain of the amplifier at high signal power levels in order to prevent overloading. Therefore, decreasing the response time of the AGC circuit and improving the overload protection it provides to the receiver allow for more accurate regeneration over a wider dynamic range.
Although there are several other methods for encoding a data stream, the technique of pulse code modulation (PCM) is commonly employed in fiber optic transmission systems. One type of PCM encoding is known as Alternate Mark Inversion (AMI), also referred to as biphase-M. In this type of signaling, the encoder generates a temporal bit cell for each bit of data input to it. At the beginning of each bit cell, there is always a transition from the previous state of the output to the opposite state (i.e., if the output was a logical "1", it will change to a logica1 "0" and vice versa). This guaranteed transition is used by the receiver logic to determine the cell boundary. Additionally, there will be a transition of the output in the center of the cell if the bit present at the input is a logical "1". (Biphase-S does just the opposite, putting a transition at the center of the cell to represent a logical "0".) Thus, if the input to such an encoder is NRZ (non-return to zero), the output will have frequency components at twice the data input rate. The output will not, however, have frequency components from DC to the data rate.
In order to compensate for shifting of the edges of the bits cells due to noise, the data stream is commonly synchronously decoded. Synchronous decoding involves generating a retiming clock signal within the receiver which retiming clock is signal synchronized with the clock of the encoded data. The retiming clock signal is used to gate the data stream so that the recovered data bits appear at the output of the receiver as a precisely timed pulse train of the sort used to modulate the optical carrier in the transmitter.
Existing retiming circuits commonly use a phase Locked Loop (PLL) which is stimulated by the edges of the bit cells as detected in the form of a derivative of the bit edge. However, this approach produces a relatively noisy signal. Furthermore, PLL circuits are generally complex, have a long transient response time, and have poor reliability.
Another approach to data clock recovery involves determining the position of transitions within a digital signal by sampling the signal and by comparing the sign of successive samples. This approach is relatively expensive in that it requires provision of several comparators and logic circuits in order to sample the signal and in order to determine the zero crossings from the samples.